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Analog Devices, Inc. Recently launched a fully programmable jitter attenuation the dual clock converter IC (integrated circuit) AD9559 timing requirements to meet the high-speed fiber-optic transmission network (OTN) applications and high-density line cards. AD9559 four-input multi-service line adaptive clock converter can support a variety of standard frequency, suitable for all kinds of wired communications applications, including synchronous Ethernet, SONET / SDH, 1/10/100G Ethernet, Fibre Channel, as well as other require low jitter, high flexibility and fast time to market.

The The AD9559 converter IC can be any standard input frequency synchronization convert any standard output frequency up to 1.25 GHz, total jitter less than 400 fs RMS (root mean square) within the range of 12 kHz to 20 MHz integration bandwidth. AD9559 single-chip IC replaced two synchronized timing devices help designers to reduce board area and optimize costs.

The AD9559 is the industry's most flexible, high-performance dual adaptive clock conversion solutions, suitable for high-density line cards and OTN applications. Adaptive clock allows locking DPLL (digital PLL), while changing the the DPLL frequency division ratio. Therefore, the output frequency can be dynamically adjusted nominal output frequency range of + / - 100 ppm frequency resolution stepper less than 0.1 ppb loop without having to disconnect or reprogram the device. AD9559IC parallel PLL architecture allows the user to generate a completely independent output clock. Two DPLL can be synchronized with one of the four input reference clock, and each the DPLL can produce two output clock. The DPLL can reduce the external reference clock input time jitter or phase noise.

With digital control loop and hold circuits, even if all the reference clock are VALID, AD9559 can continuously generate clean (low jitter), the effective output clock. Take advantage of the the AD9559 clock converter built-in programming capability, network line card design engineers can use the same devices in many different circuit board design, to reduce the number of devices required and reduce the overall system cost.

The AD9559 clock converter size 10 mm x 10 mm, to facilitate line card design to obtain a compact, frequency agility, high cost of the clock. Suitable applications include data communications, a new generation of wired network applications, test and measurement, high-speed data acquisition, video applications, and wireless base station controllers.

Main features of the four-input dual adaptive clock converter AD9559

Dual PLL architecture, four reference input (single-ended or differential) with an input connected to the crossing point support the adaptive clock bandgap clock input reference, suitable for OTN demapping applications to support stability in the hold mode GR-1244 Stratum 3 smooth reference switching output phase almost no disturbance supports Telcordia GR-253 jitter generation, conversion and tolerance for SONET / SDH OC-192 system. ITU-T G.8262 synchronous Ethernet clock support ITU-T G.823, G.824, G.825 and G.8261